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NVIDIA

Senior SoC Design Engineer

India · Mid Level

Older listing - lower visibility likelyVerified listingPosted 47d ago

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86Overall
64Skills
97Experience

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What we know about this role

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Skills required

5 listed
SubsystemsVerilogUSBPerl (Programming Language)Python (Programming Language)
SubsystemsVerilogUSBPerl (Programming Language)Python (Programming Language)

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Job description

NVIDIA is seeking a Senior SoC Design Engineer to design the next-generation SoCs. We are looking for special individuals to deliver innovative products. Together, we will build the next generation of life-changing SoCs. If you are a motivated individual who understands how complex SOC and Subsystems are built, has intimate knowledge of client requirements, and understands various development cycles, this is your place to be.

What you'll be doing:

  • Drive SOC execution working with all multi-functional teams to define, track and drive dependencies working closely with the SoC verification, DFT, STA, Low Power and Validation teams.

  • Drive SoC Assembly, SoC level quality checks, Connectivity reviews and signoff, SoC level Lint and CDC, Bug Triaging, Code reviews and ECOs.

  • Participate in silicon architecture, micro-architecture reviews, collaborate with Architecture, SW/FW, Design, Modeling, Verification, Emulation, and Post-Silicon Validation teams to ensure comprehensive first-time right SoC design.

  • Collaborate with IP development teams, and participate in, and support soft and hard IP identification, selection and IP licensing.

  • Identify candidates, hire, and mentor SoC Design engineers, and as a team, identify problems and inefficiencies in the process and propose solutions.

What We Need To See:

  • Bachelor's or Master's degree or equivalent experience in Electronics and Communication Engineering or Electrical Engineering.

  • 3-12 years of hands on SoC Design experience, expertise in Verilog/System-Verilog, Knowledge of AMBA protocols - AXI, AHB, APB, SoC Clocks/RST/Debug architecture and sound understanding of peripherals ( USB, PCIE and SDCC)

  • Strong coding skills in Perl, Python, or other industry-standard scripting languages.

  • Experience in RTL Build flows and Makefiles, Synthesis is a plus.

  • Experience working with SoC level floorplan team is an added advantage.

  • Background in developing tools and infrastructure using Perl or Python.

  • Excellent analytical and problem-solving skills.

We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.

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Applicants who checked fit first are 3.1× more likely to hear back

Your match scoreCalculated · locked
86Overall
64Skills
97Experience

Your score for this role already exists

ASAI compared this JD against 41 signals - skills, seniority, domain, stack overlap etc. Add a resume and it unlocks in about 30 seconds.

No credit card · 1 tap with Google

Free · no signup

Get tomorrow's jobs before you have to search

Daily job drops, skill trends and free resources - posted straight to the group. Leave any time.

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Why people use ASAI

Someone shared one job with you. ASAI keeps finding the rest.

  • Scored, not searched. Every role ranked against your actual profile.

  • Alerts as often as hourly. Reach new roles while the pile is still small.

  • Skill gaps, spelled out. See exactly which requirements you don't meet yet.

  • Verified jobs, only. Say no to ghost jobs. Your time deserves respect.

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